Amplifier having ultra-low distortion

ABSTRACT

This invention is for an improvement in amplifiers resulting in ultra low distortion. It relates to amplifiers consisting of three stages, an input stage which amplifies an input signal and provides a first signal to an intermediate stage which amplifies the first signal and provides a second signal to an output stage which amplifies that second signal and provides an amplifier output signal, the amplifier further including a power supply to provide power to the three stages and wherein the low distortion is achieved by the output stage including output transistors connected to provide the amplifier output signal and further including an error correction means that comprises an input buffer means, an adding means, a subtracting means and a voltage follower buffer means wherein the adding means sums the second signal with a difference signal to produce an output sum signal the said output sum signal fed to the voltage follower buffer means which then provides a buffered output sum signal, which is then fed to the inputs of the output transistors and to the subtracting means, the amplifier output signal is also fed to the subtracting means which is adapted to subtract the amplifier output signal from the buffered output sum signal to produce a difference signal and a first bootstrap power supply to provide power to the error correction means, the bootstrap power supply closely tracking the output signal by means of bootstrapping.

TECHNICAL FIELD

This invention relates to amplifiers and in particular relates to anarrangement of an amplifier and to a method of amplification whichprovides improved accuracy of the amplification.

BACKGROUND ART

Most amplifiers consist of three stages:

1. An input stage, normally a differential voltage to current converterstage, in which current variations are relatively small;

2. followed by an intermediate stage whose output may produce largevoltage variations and about which the amplifier's dominant pole isoften formed;

3. which is then followed by an output stage most often in the form of avoltage follower.

All three stages produce distortion which affects the signal to beamplified, the output stage usually being the worst.

Throughout this specification the following descriptions are used:

The input signal to the amplifier is termed an "amplifier input signal"and is supplied to an "amplifier input", which is used to denote theinput of an "input stage" adapted to amplify the amplifier input signaland to provide a "first signal."

The first signal is fed to a next stage, termed an "intermediate stage"which is adapted to amplify the said first signal and further adapted toprovide a "second signal." The second signal is fed to an input of an"output stage" adapted to amplify the said second signal and furtheradapted to provide an "amplifier output signal" to an "amplifieroutput."

A "power supply means" is adapted to provide power to the input stage,the intermediate stage and the output stage.

A review of the current state of the art in low distortion has beengiven by D. Self in a series of articles in "Electronic World+WirelessWorld" from August 1993 to January 1994. In these articles distortionsin each of the three stages as set out above are described and currentbest methods for achieving low distortion are discussed.

The D. Self articles discussed above recommended that the first stage isa differential voltage to current converter, followed by an intermediatestage about which the dominant amplifier pole is formed. Thisintermediate stage is a cascade amplifier feeding a constant currentsource so that distortion from the well known "Early effect" is avoided.Buffer transistors are inserted between the output transistors and theintermediate stage. The lowest distortion is achieved by using asymmetrical complementary bi-polar transistors in the output stage,where the one half is a driver-npn-cum-power-pnp pair configured with alarge measure of local negative feedback and the other half is similarlya driver-pnp-cum-power-npn pair configured with a large measure of localnegative feedback. The Self articles also recommends and teach certaincircuit layouts so that spurious sources of distortion causingmechanisms may be avoided.

The lowest combination of distortion as taught by those articles gives atotal harmonic distortion of about 10 parts per million (10 ppm) at 1kHz and a little over 100 ppm at 20 kHz. However this was measured in aamplifier of very modest power, namely 10 watts. These figures arethought to be consistent with the best state-of-the-art low distortionamplifiers presently commercially available and possible from currentlyknown techniques.

DISCLOSURE OF THE INVENTION

In accord with the teaching of this invention an amplifier has beenbuilt that achieves significantly less distortion than hitherto knownand in one preferred embodiment achieves less than 1 ppm distortion at20 kHz and an unmeasurable rating by current instruments at 1 kHz, butwhich is certainly less than 0.3 ppm and probably less than 0.1 ppm.This has also been achieved at high powers (up to 400 watts) as comparedwith the powers used by D. Self, and using a B-class MOSFET outputstage. Both of these factors normally result in higher distortionscompared to that attainable at lower powers, and especially with thebipolar output transistors, or A-class amplifiers regardless of theoutput devices used.

This invention achieves this by teaching a different topography in allthree stages to achieve an approximately two orders of magnitudeimprovement.

Therefore in one form of the invention there is proposed an electronicamplifier apparatus comprising of an input stage, to which an amplifierinput signal is applied and which is adapted to amplify the amplifierinput signal and to provide a first signal to an intermediate stageadapted to amplify the said first signal and further adapted to providea second signal to an output stage adapted to amplify the said secondsignal and further adapted to provide an amplifier output signal to anamplifier output and a power supply means adapted to provide power tothe input stage, the intermediate stage and the output stage, whereinthe output stage including output transistors connected so as to providethe amplifier output signal and further including an error correctionmeans comprising of an input buffer means, an adding means, asubtracting means and a voltage follower buffer means wherein, the saidadding means is adapted to sum the second signal with a differencesignal to produce an output sum signal, the said voltage follower buffermeans is adapted to provide a buffered output sum signal when fed theoutput sum signal, the buffered output sum signal is fed to inputs ofthe output transistors and to the subtracting means, the amplifieroutput signal is fed to the subtracting means which is adapted tosubtract the amplifier output signal from the buffered output sum signalto produce the difference signal, and a first bootstrapped power supplyis adapted to provide power to the error correction means, the firstbootstrapped power supply further adapted to closely track the outputsignal by means of bootstrapping.

Preferably all transistors in the error correction means are smallsignal transistors.

Preferably the second signal is also fed to a constant current sourcewhose power is supplied by the said first bootstrapped power supplymeans which is further adapted to provide power to the constant currentsource, the constant current source containing a constant current supplytransistor which is a small signal transistor.

Preferably the bootstrapped power supply means has little distortion andhas local negative feedback.

Preferably the output buffered sum signal is substantially independentof temperature.

Preferably said voltage follower buffer has substantially high inputimpedance, low output impedance, low distortion and negative feedbacklocalised to the said voltage follower buffer.

Preferably the said voltage follower buffer has substantially high inputimpedance, low output impedance, low distortion and negative feedbacklocalised to the said voltage follower buffer.

Preferably the input stage contains a first input differential stageadapted to convert a voltage differential signal to a current signalwhose amplitude is substantially linearly proportional to the saidvoltage differential signal, the first differential input stagecontaining transistors across which a potential difference is heldsubstantially constant.

Preferably the input stage contains a first input differential stageadapted to convert a voltage differential signal to a current signalwhose amplitude is substantially linearly proportional to the saidvoltage differential signal, the first differential input stagecontaining transistors across which said potential difference is heldsubstantially constant.

Preferably the input stage contains a first input differential stageadapted to convert a voltage differential signal to a current signalwhose amplitude is substantially linearly proportional to the saidvoltage differential signal, the first differential input stagecontaining transistors across which said potential difference is heldsubstantially constant.

In a further form of the invention there is proposed a method ofelectronic amplification by applying an amplifier input signal to anamplifier input stage to amplify the amplifier input signal and providea first signal, said first signal then amplified by an intermediatestage and providing a second signal, that is amplified by an outputstage that provides an amplifier output signal to an amplifier output,the stages provided power by a power supply means wherein the outputstage contains output transistors which provide the amplifier outputsignal and also contains an error correction means consisting of aninput buffer means, a adding means, a subtracting means and a voltagefollower buffer means wherein, the adding means sums the second signalwith a difference signal to produce an output sum signal, the voltagefollower buffer means provides a buffered output sum signal when fed theoutput sum signal, the buffered output sum signal is fed to inputs ofoutput transistors and to the subtracting means, the amplifier outputsignal is fed to the subtracting means which subtracts the amplifieroutput signal from the buffered output sum signal to produce thedifference signal, and power is supplied to the error correction meansby a first bootstrapped power supply which closely tracks the outputsignal by means of bootstrapping.

In one embodiment, the output stage contains an error correction meansconsisting of an input buffer means, a adding means, a subtracting meansand a voltage follower buffer means. The adding means is adapted to sumthe second signal with a difference signal to produce an output sumsignal which is fed to. The voltage follower buffer means which providesa buffered output sum signal when fed the output sum signal. Thebuffered output sum signal is fed to inputs of output transistors and tothe subtracting means. The amplifier output signal is fed to thesubtracting means which subtracts the amplifier output signal from thebuffered output sum signal to produce the difference signal. Here the"gain" of the adding means, subtracting means and voltage followerbuffer means is set to unity. This topology substantially reduces thedistortion arising from the output transistors which when producing theoutput signal intrinsically generate a non-linear error component signal(distortion).

Suppose the amplifier output signal is the buffered output sum signalplus the non-linear error component signal, then the difference signalis negative the non-linear error component signal. When this differencesignal is added to the output stage input signal (the second signal),the output sum signal which equals the buffered output sum signal is thesecond signal minus the non-linear error component signal. Hence simplearithmetic then shows that the amplifier output signal in fact equalsthe second signal and hence the distortion from the output transistorsis eliminated. Note this is not negative feedback, at least not in thetraditional sense. Unlike negative feedback, this is a precise additionand subtraction with a unity gain and hence the poles of the transferfunction in this do not significantly effect the requirements of theamplifiers dominant pole as they would in a traditional amplifier withenough local negative feedback in the output stage to reduce the outputstage distortion down to the levels achievable using this errorcorrection technique. Thus it is possible to substantially improveoverall distortion by using this error correction technique rather thanthe use of negative feedback.

However, the above embodiment assumes that the buffers, adders andsubtractors themselves produce insignificant distortion; if theconventional amplifier topology is adopted in implementing thebuffering, adding and subtracting stages, namely by implementing anoutput stage input buffer, the intermediate stage cascade constantcurrent "load" and voltage follower buffer, and possibly also the adderand subtracter, using the traditional medium power large signaltransistors with power provided from the amplifier power supply rails,then the improvement over the prior teachings of Self and commerciallyavailable amplifiers is about an order of magnitude, not two.

In order to achieve an improvement of a factor of about two orders ofmagnitude, it is necessary to employ two other non-traditional changes,namely, the buffers, constant current source, added and subtractershould use transistors whose power is derived not from the amplifiersupply rails, but from a bootstrapped supply which closely tracks theamplifier output signal. This then reduces the distortion generatingeffects in these transistor stages such as gain modulation with voltage(Early effect) and non-linear capacitance effects. Furthermore, allthese transistors can be small signal types, provided that thebootstrapped supply voltages are kept reasonably small about theamplifier output signal. Compared to high voltage, especially highvoltage power types (large signal devices), small signal low voltagetransistors are obtainable with substantially higher gains, highertransition frequencies and lower inter-terminal capacitances. Gains varyaccording to collector (or drain) voltages and current. Inter-terminalcapacitances vary according to inter-terminal voltages. Frequency gaincut-offs effect the degree of local and global feedback. All thesedistortion affecting mechanisms substantially act in the small signal,high gain, high frequency and low inter-terminal capacitancetransistors' favour. Hence a substantially higher component ofdistortion will result from the use of high voltage (power) transistorscompared to the use of the small signal types performing the sameoperations.

Table I illustrates these differences in typical high quality audiotransistors:

                  TABLE I    ______________________________________    Parameter     Small signal type                               Large signal type    ______________________________________    current gain  500              100    transition frequency                  300     MHz      100   MHz    collector capacitance                  2.5     pF       25    pF    break down voltage                  45      v        250   v    power dissipation                  0.5     W        20    W    ______________________________________

The said bootstrapped supply may be bootstrapped to the outputs of theoutput stage input buffers as the signal at this point is substantiallythe same as the amplifier output signal.

Further more, at high frequencies the input impedance of the outputtransistors can present a significant non-linear load to the voltagefollower buffers because of the non-linear output transistorcapacitances (as a function of voltage) and non-linear input currents inthe case of bi-polar transistors as a function of collector current andvoltage. Unless the voltage follower buffers have a low outputimpedance, high gain and low distortion, this non-linear load can be asignificant source of distortion. In order to avoid this distortion, wehave shown that a voltage follower buffer with substantial localfeedback can be used without a measurable contribution to the distortionat high frequencies. Again it is advantageous if the transistors in thisstage are small signal types.

There are two heat areas in a power amplifier, the temperature of theprinted circuit board (PCB) mounted circuitry and the temperature of theheat sink.

It is important that both should be compensated for in basic amplifieroperation. In particular, the output buffered sum signal which suppliesthe output transistors should be substantially independent oftemperature in order to avoid changing quiescent currents in the outputtransistors as the temperature changes.

Only when low distortions of several parts per million or less areencountered, does distortion in the input stages of non-invertingamplifiers become significant, even with the best input circuitsrecommended and taught by Self. We have discovered that this distortionarises from non-linear transistor properties which are effected by inputcommon mode voltage swings. In particular, distortion arises frommodulated voltages across transistors in an input differential stagewhich converts a voltage differential signal to a current signal (whoseamplitude is substantially linearly proportional to the said voltagedifferential signal). As taught above this source of distortion can bereduced by maintaining the potential difference across these transistorssubstantially constant. (In an inverting amplifier with a "virtualground" differential input, this is not an issue.) In some prior artamplifiers, the voltage across the transistors in the input differentialvoltage to current converter is held substantially constant. In theseamplifiers the effects of the distortion of the intermediate and outputstage, and even the said input differential voltage to current converterwould vastly exceed the small improvement produced by the maintenance ofconstant voltage across these transistors. There is rather anotheradvantage of this said maintenance, namely the protection againstvoltage overload across these transistors if for some reason inputcommon mode voltage is applied that falls outside the expected normaloperating range.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram in block form of the present invention;and

FIG. 2 is a circuit diagram of the preferred embodiment of the presentinvention.

Turning now to the figures in detail they show in FIG. 1 an amplifiedapparatus 200 containing a power supply 201 which supplies power to aninput stage 202, an intermediate stage 203 and an output stage 204. Anamplified input signal 205 is fed to an amplified input 401 in the inputstage 202. The amplified input 401 is an input to a voltage to currentconverter 206. The voltage to current converter output 207 is fed tofurther circuitry 208 in the input stage 202. An output signal 209 fromthe input stage 202 feeds a first signal to an input 402 of theintermediate stage 203. The intermediate stage 203 feeds a second signal403 to the output stage 204 and to an input buffer 301 and to a constantcurrent source 303. The output of input buffer 301 feeds a bufferedsecond signal 405 to an adding means 302. Another signal 408 is input tothe adding means 302 from the output of subtracting means 304. Signal408 is a difference signal from the subtracting means 304. The addingmeans provides an output sum signal 406 to the input of voltage followbuffer means 305, the voltage follower buffer means 305 supplies abuffered output sum signal 407 to the output transistor 306. Theseoutput transistors 306 provide to the amplifier output signal 500 at theamplifier output 210. The output transistor 306 receives power fromsupply 201. The buffered output sum signal 407 and amplifier outputsignal 500 are both fed to the subtracting means 304 which as a resultproduce the difference signal 408. The power supply 201 provides powerto the first bootstrap power supply 307 whose control input 409 isconnected to amplifier output 210. There may be a second bootstrap powersupply 308 with a control input 409 also connected to amplifier output210. Power to the first and second bootstrap power supplies, 307 and 308is supplied by power supply 201. The power to input buffer 301, addingmeans 302, constant current source 303, subtracting means 304, andvoltage follower buffer means 305 is derived from the first bootstrappower supply 307 and the second boot strap power supply 308 rather thanfrom power supply 201 directly. The transistors in input buffer 301,adding means 302, constant current source 303, subtracting means 304,and voltage follower buffer means 305 are small signal types.

The circuit diagram of the preferred embodiment is shown in FIG. 2.

In FIG. 2, the amplifier input signal is fed into terminals 1 and 2,where 2 is the amplifier ground. The amplifier input signal is thendirected via resistor 3 to the inverting input of the amplifier, thebase of transistor 4.

Transistors 4, 8, 10, 12, 13, 14, 15, 16, 18, 19, 22 and 67, resistors5, 7, 9, 11, 20, 21, 23, 69 and 68, diode 17 and current source 6 formthe input stage. The differential voltage to current converter is formedby transistors 4, 8, 10, 12 and resistors 5, 7, 9, and 11. The output ofthis first stage, the first signal, is issued from the collectors oftransistors 15 and 18 to the next stage.

The emitter of transistor 4 is connected to resistor 5 and the collectorof transistor 10. The collector of transistor 4 is connected to the baseof transistor 10 and resistor 9. Resistor 5 is connected to resistor 7and a constant current source 6 which is supplied from supply rail 140.The collector of transistor 8 is connected to resistor 11 and the baseof transistor 12. Resistor 11 is connected to the emitter of transistor12 and the emitter of transistor 13. Resistor 9 is connected to theemitter of transistor 10 and the emitter of transistor 14. The base oftransistor 8 is connected to ground 2. The bases of transistors 13 and14 are connected and these are also connected to resistor 69 andcollector of transistor 22. This differential input voltage to currentconverter has highly linear transfer ratio, that is low distortion; thelow distortion arising as a result of substantial local negativefeedback and differential emitter resistor degeneration. Note thattransistors 13 and 14 are "cascade transistors."

Resistors 5 and 7 and current source 6 are also connected to the base oftransistor 67. Resistor 69 is connected to the emitter of 67 and thecollector of transistor 67 is connected to resistor 68 which isconnected to supply 140. The collector of 13 is connected to the emitterof transistor 15 and the collector of 14 is connected to the emitter oftransistor 16. The bases of transistors 15 and 16 are connected andthese are also connected to resistor 30, Zener diode 27, capacitor 26and the base of transistor 29.

The HT+ power supply rail 42 is connected to resistors 20, 21, 23, diode27, capacitor 26 and emitter of transistor 28. The collectors oftransistors 15 and 18 are connected and these are connected to diode 24and capacitors 25 and 53. The collectors of transistors 16 and 19 areconnected and these are connected to diode 17. The bases of transistors18 and 19 are connected and these are connected to diode 17. Resistor 69is connected to the collector of transistor 22 and the emitter of 22 isconnected to resistor 23.

For reasons previously discussed, common mode distortion is reduced ifthe voltage across the differential input voltage to current convertertransistors is held constant, namely transistors 4, 8, 10 and 12. Thevoltage difference between the bases, and hence emitters, of transistors4 and 8 is relatively small owing to large open loop gain. Hence thevoltage at the node connecting resistors 5 and 7 and constant currentsource 6 substantially follows the common mode input voltage relative tothe rails, but offset from it by an effectively constant voltage. Thiscommon mode offset voltage is fed to the base of transistor 67. Thecurrent flowing though both the resistor 69 and transistor 67 issupplied by a constant current source consisting of transistor 22 andresistor 23. Little current is diverted to the bases of transistors 13and 14. Hence the potential difference between the emitters oftransistors 4 and 8 and emitters of 13 and 14 is held substantiallyconstant, which satisfies the requirement.

The dominant pole capacitor 53 is connected from the collector oftransistor 29 to the base of 28, via the voltage dropping diode 24 anddecoupling capacitor 25. The base of the cascade transistor 29 is biasedto a voltage set by Zener diode 27 with paralleled capacitor 26. TheZener current is supplied via resistors 30.

The collector of 29 is connected via a constant voltage source 31, whichmay include heat sink temperature compensation, to a constant currentsource, namely the collector of transistor 32. Unlike the traditionalconstant current sources in this position, here this source does notincorporate a high voltage transistor, nor is it connected to theamplifier supply rail 137. Rather it consists of a small signal highgain, high frequency, low capacitance transistor 32 connected to supplynode 39 which is bootstrapped to the output signal. However this couldequally well be bootstrapped to the buffered second input signal whichis manifest at the emitters of output stage input buffer transistors 40and 56, namely nodes 45 and 55. The constant current source consists oftransistor 32 with emitter resistor 33 and the Zener diode 34 in serieswith a temperature compensating diode 35, with parallel capacitor 36decoupling 35 and 34 which set the voltage between the base of 32 and39. The Zener diode 34 and diode 35 current is fed from resistor 37which is supplied by another bootstrapped voltage supply node 38, alsobootstrapped to the to the output. The action of bootstrapping heremeans that the bootstrapped voltage tracks the output signal, but isoffset from it by a constant voltage offset.

The voltage at the collector of transistor 29 and transistor 32 is thesecond signal. The signal from the collector of 29 is buffered by anoutput stage input buffer, namely a voltage follower transistor 40 andthe signal from the collector of 32 is buffered by an output stage inputbuffer, namely a voltage follower transistor 56. Both of thesetransistors are small signal high gain, high frequency, low capacitancetransistors supplied by the said bootstrapped supply nodes, viz 38 and39.

The emitter output of the buffer transistor 40 is connected to resistor43.

Resistor 43 feeds node 44 which is the output of the said subtractingmeans, namely the collector of transistor 50 and also the node of theinput to the said voltage follower buffer, namely the base of transistor62. Note too that 44 is also the output sum signal.

The collector of the current source transistor 32 is connected to thebase of a buffer voltage follower transistor 56 which has it's collectorsupplied by the second bootstrapped voltage source supply at node 39.The emitter output of the buffer transistor 56 is connected to resistor57. Resistor 57 feeds node 54 which is the output of the saidsubtracting means, namely the collector of transistor 63 and also thenode of the input to the said voltage follower buffer, namely the baseof transistor 58. Note too that 54 is also the output sum signal. Thereis a constant voltage between 44 and 54. The sum and difference signalrefer to a.c. signals

The current from collectors of 50 and 63 should be only responsive tothe non-linear error component signal. This current signal is manifestedas a voltage drop across resistor 43 and also 57.

The collector of transistor 62 (npn) is connected to the positivebootstrapped voltage source via resistor 46. The collector is alsoconnected to the base of transistor 47 (pnp) whose collector in turn isconnected to the emitter of transistor 62. The emitter of transistor 47is also connected to the positive bootstrapped voltage source node 38.Transistors 62 and 47 form a voltage follower buffer with a high levelof local negative feedback which results in a high input impedance, lowoutput impedance, low distortion, and a transfer function relativelyindependent of output current or output load. Hence the voltage at theemitter of 62 faithfully reproduces the voltage at it's base, except fora voltage offset. This is the buffered output sum signal, that is atnodes 48 (bar a d.c. offset). Similarly transistors 58, 59 and resistors60 also form an identical complementary buffer and so the node 77 alsois the buffered output sum signal (bar a d.c. offset).

48 feeds the gate of the output transistor 91 gate via a resistor 90,and 77 feeds the gate of the output transistor 93 gate via a resistor92. These resistors may be necessary to quench possible high frequencyoscillations.

The emitter of transistor 62 is connected to resistor 49 which is alsoconnected to resistor 61 and variable resistor 65. Resistor 65 isconnected to resistor 66 and 64. 64 is connected to the emitter oftransistor 50. The base of transistor 50 is connected to reference diode52 and resistor 71 which is connected to node 38.

The emitter of transistor 58 is connected to resistor 61. Resistor 66 isconnected to the emitter of transistor 63. The base of transistor 63 isconnected to reference diode 72 and resistor 76 which is connected tonode 39. The diodes 52 and 72 are connected to the amplifier output 96.

Barring constant voltage offsets, the output signal of the amplifier at96 appears at the bases of transistors 50 and 63. Transistors 50 and 63are wired up as subtracter circuits, where the amplifier output signalis subtracted from the signal at nodes 48 and 77.

This subtraction signal is manifest as transistor 50 and 63 collectorcurrents of opposite sign senses. That is if the current in 50 increasesthen that in 63 decreases by the same amount. These currents are thenadded to the second signal for reasons given above. Hence ideally, thesecond signal equals the output signal and the non linear errorcomponent signal generated in the output transistors does not appear atthe output.

For the circuit action to perform accurately the value of resistor 49plus 2 times that of 65 plus the effective resistance of 64 must equalthat of the effective resistor 43, taking the effective seriestransistor associated resistances into account. This assumes resistor 49substantially equals 61 and resistor 64 substantially equals 66 andresistor 43 substantially equals 57. In practice the variable resistor65 is adjusted to fine set the error correction by adjustment tominimise harmonic distortion.

Transistor 91 is supplied by a power supply connected to 94 and ground97, and transistor 93 is supplied by a power supply connected to 95 andground. The sources of both 91 and 93 feed the output 96. The generationof the said non-linear error component signal occurs in the outputtransistors 91 and 93.

It is important that the voltage between the gates of transistors 91 and93 is independent of the PCB temperature, but dependent on thetemperature of transistors 91 and 93 so that the quiescent currentthrough transistors 91 and 93 is independent of both the temperature ofthe PCB and 91 and 93. The temperature tracking of 91 and 93 can occurthrough elements in 31 in any well known appropriate circuitarrangement. It can be shown mathematically that if resistor 64 plusresistor 66 equals double resistor 43 plus double resistor 57, thenassuming transistors 40, 56, 50, 63, 62 and 58 are at the sametemperature (PCB temperature) then the voltage difference between 48 and77 will be approximately temperature independent of the PCB temperaturebut dependent on the temperature of 91 and 93.

Zener diode 100 is connected to diode 101. Across these diodes is adecoupling capacitor 102. Diode 101 and capacitor 102 are connected toresistors 103 and 104. Resistor 103 is connected to the base oftransistor 105. The collector of 105 is connected to resistor 107 andthe base of transistor 106. The emitter of 106 is connected to resistors107 and 104 and to the source of transistor 111. The emitter oftransistor 105 is connected to the collector of 106 and to resistor 108.Resistor 108 is connected to the positive bootstrapped supply node 38.Zener diode 109 is connected to resistors 113 and 112. Decoupling andstorage capacitor 110 is connected across 109. The gate of transistor111 is connected to resistor 113 and the collector of 111 is connectedto the HT+ supply 42 and resistor 112 and decoupling capacitor 41 whichis connected to ground 97. 97 is connected to 2.

Zener diode 120 is connected to diode 121. Across these diodes is adecoupling capacitor 122. Diode 121 and capacitor 122 are connected toresistors 123 and 124. Resistor 123 is connected to the base oftransistor 125. The collector of 125 is connected to resistor 127 andthe base of transistor 126. The emitter of 126 is connected to resistors127 and 124 and to the source of transistor 131. The emitter oftransistor 125 is connected to the collector of 126 and to resistor 128.Resistor 128 is connected to the negative bootstrapped supply node 39.Zener diode 129 is connected to resistors 133 and 132. Decoupling andstorage capacitor 130 is connected across 129. The gate of transistor131 is connected to resistor 133 and the collector of 131 is connectedto the HT-supply 137 and resistor 132.

Note that these bootstrapped supplies form a "cascaded" bootstrappedsupply. The transistors 105, 106, 125 and 126 are small transistor typeswith substantial local negative feedback and produce a bootstrappedvoltage which follows the output signal with relatively littledistortion. On the other hand substantial voltage variation occursacross power transistors 111 and 131 and the sources of these producerelatively high distortion, but this does not effect the integrity ofthe buffers, adder or subtracter because of the isolation of thetransistor 105, 106 and 125, 126 bootstrapped supply which wouldotherwise occur. Storage capacitor 136 maintains a constant voltagebetween 38 and 39.

Overall negative feedback is formed via series resistors 98 and 99connected from the output 96 back to the amplifier inverting input.

A series resistor 80 capacitor 79 network is connected across resistor43 to quench possible high frequency oscillations. For the same reasonsa series resistor 81 capacitor 82 network is connected across resistor57, and a series resistor 83 capacitor 84 network is connected betweenthe emitter of transistor 50 and ground 97, and a series resistor 85capacitor 86 network is connected between the emitter of transistor 63and ground 97. Also a capacitor 87 is connected between ground and thenode connecting resistors 49, 61 and 65. A series resistor 114 andcapacitor 115 and resistor 134 and capacitor 135 may be necessary toquench high frequency oscillation in the bootstrapped power supplies.Note there are many possible arrangements to achieve the low distortionsusing the inventive steps described herein. For example, it is notessential to have a symmetrical arrangement of input buffers, adders,subtracters and output buffers as shown in FIG. 2. One of each wouldsuffice with appropriate biasing.

The low distortion achievable with this circuit lies in several areas,namely the use of the error corrected amplification output stage meanscontaining only small signal high gain, high frequency, low capacitancetransistors in the adding means and subtracting means stages, as well asvoltage follower buffers, output stage input buffers and the saidconstant current source. This is made possible with the supplies tothese stages being of relatively low voltage potential difference whichare bootstrapped to the output signal (or second input buffered signal).In addition the use of a low distortion high input impedance, low outputimpedance, low distortion voltage follower buffers feeding the outputtransistors where the transfer function of these buffers are relativelyload independent, assists substantially in reducing distortion by theirprecise action. Furthermore, in a practical amplifier thermalindependent operation of the output stage quiescent current should beensured. In non-inverting arrangement, voltage modulation across thecommon mode input differential voltage to current converter transistorsshould be avoided by cascade transistors bootstrapped to the common modevoltage.

I claim:
 1. An electronic amplifier apparatus comprising an input stage,to which an amplifier input signal is applied and which is adapted toamplify the amplifier input signal and to provide a first signal to anintermediate stage adapted to amplify the said first signal and furtheradapted to provide a second signal to an output stage adapted to amplifythe said second signal and further adapted to provide an amplifieroutput signal to an amplifier output, and a power supply means adaptedto provide power to the input stages the intermediate stage and theoutput stage, wherein:the output stage includes output transistorsconnected so as to provide the amplifier output signal and furtherincludes an error correction means comprising an input buffer means, anadding means, a subtracting means and a voltage follower buffer meanswherein, the input buffer means adapted to receive the second signal andconnected to the adding means, the said adding means is adapted to sumthe second signal with a difference signal to produce an output sumsignal, the said voltage follower buffer means is adapted to provide abuffered output sum signal when fed the output sum signal, the bufferedoutput sum signal is fed to inputs of the output transistors and to thesubtracting means, the amplifier output signal is fed to the subtractingmeans which is adapted to subtract the amplifier output signal from thebuffered output sum signal to produce the difference signal, and a firstbootstrapped power supply is adapted to provide power to the errorcorrection means, the first bootstrapped power supply further adapted toclosely track the output signal by means of bootstrapping.
 2. Anelectronic amplifier apparatus as in claim 1 wherein all transistors inthe error correction means are small signal transistors.
 3. Anelectronic amplifier apparatus as in either of claims 1 or 2 in whichthe second signal is also fed to a constant current source whose poweris supplied by the said first bootstrapped power supply means which isfurther adapted to provide power to the constant current source, theconstant current source containing a constant current supply transistorwhich is a small signal transistor.
 4. An electronic amplifier apparatusas in claims 1 or 2 wherein the bootstrapped power supply means haslittle distortion and has local negative feedback.
 5. An electronicamplifier apparatus as in claims 1 or 2 wherein the output buffered sumsignal is substantially independent of temperature.
 6. An electronicamplifier apparatus as in any claims 1 or 2 in which the said voltagefollower buffer has substantially high input impedance, low outputimpedance, low distortion and negative feedback localised to the saidvoltage follower buffer.
 7. An electronic amplifier apparatus as inclaim 4 in which the said voltage follower buffer has substantially highinput impedance, low output impedance, low distortion and negativefeedback localised to the said voltage follower buffer.
 8. An electronicamplifier apparatus as in any one of claims 1 or 2 wherein the inputstage contains a first input differential stage adapted to convert avoltage differential signal to a current signal whose amplitude issubstantially linearly proportional to the said voltage differentialsignal, the first differential input stage containing transistors acrosswhich a potential difference is held substantially constant.
 9. Anelectronic amplifier apparatus as in claim 4 wherein the input stagecontains a first input differential stage adapted to convert a voltagedifferential signal to a current signal whose amplitude is substantiallylinearly proportional to the said voltage differential signal, the firstdifferential input stage containing transistors across which saidpotential difference is held substantially constant.
 10. An electronicamplifier apparatus as claim 5 wherein the input stage contains a firstinput differential stage adapted to convert a voltage differentialsignal to a current signal whose amplitude is substantially linearlyproportional to the said voltage differential signal, the firstdifferential input stage containing transistors across which saidpotential difference is held substantially constant.
 11. A method ofelectronic amplification including applying an amplifier input signal toan amplifier input stage to amplify the amplifier input signal andprovide a first signal, amplifying said first signal by an intermediatestage and providing a second signal, amplifying said second signal by anoutput stage that provides an amplifier output signal to an amplifieroutput, the stages provided power by a power supply means;the outputstage containing output transistors which provide the amplifier outputsignal and also containing an error correction means consisting of aninput buffer means, an adding means, a subtracting means and a voltagefollower buffer means, the input buffer means adapted to receive thesecond signal and connected to the adding means; and further includingthe steps of: summing in the adding means the buffered second signalwith a difference signal to produce an output sum signal, feeding thevoltage follower buffer means with the output sum signal to provide abuffered output sum signal, feeding the buffered output sum signal toinputs of the output transistors and to the subtracting means, feedingthe amplifier output signal to the subtracting means which subtracts theamplifier output signal from the buffered output sum signal to producethe difference signal, and supplying power to the error correction meansby a first bootstrapped power supply which closely tracks the outputsignal by means of bootstrapping.
 12. A method of electronicamplification as in claim 11 wherein all transistors in the errorcorrection means are small signal transistors.
 13. A method ofelectronic amplification as in either of claims 11 or 12 furtherincluding feeding the second signal to a constant current source whosepower is supplied by the said first bootstrapped power supply means andwhich contains a constant current supply transistor which is a smallsignal transistor.
 14. A method of electronic amplification as in claims11 or 12 wherein the bootstrapped power supply means has littledistortion and has local negative feedback.
 15. A method of electronicamplification as in claims 11 or 12 wherein the output buffered sumsignal is substantially independent of temperature.
 16. A method ofelectronic amplification as in claims 11 or 12 in which the said voltagefollower buffer has substantially high input impedance, low outputimpedance, low distortion and negative feedback localised to the saidvoltage follower buffer.
 17. A method of electronic amplification as inclaim 14 in which the said voltage follower buffer has substantiallyhigh input impedance, low output impedance, low distortion and negativefeedback localised to the said voltage follower buffer.
 18. A method ofelectronic amplification as in claims 11 or 12 wherein the input stagecontains a first input differential stage which converts a voltagedifferential signal to a current signal whose amplitude is substantiallylinearly proportional to the said voltage differential signal, the firstdifferential input stage containing transistors across which a potentialdifference is held substantially constant.
 19. A method of electronicamplification as in claim 14 wherein the input stage contains a firstinput differential stage which converts a voltage differential signal toa current signal whose amplitude is substantially linearly proportionalto the said voltage differential signal, the first differential inputstage containing transistors across which a potential difference is heldsubstantially constant.
 20. A method of electronic amplification as inclaim 16 wherein the input stage contains a first input differentialstage which converts a voltage differential signal to a current signalwhose amplitude is substantially linearly proportional to the saidvoltage differential signal, the first differential input stagecontaining transistors across which a potential difference is heldsubstantially constant.